1. Field of the Invention
The present invention relates to a wiring board incorporating the function of a capacitor, an inductor, or both internally, and a method of fabricating such a wiring board. Furthermore, the present invention generally relates to a wiring board, a semiconductor device including a wiring board, and a wiring board fabrication method, more particularly, to a wiring board with a capacitor device, a semiconductor device including such a wiring board, and a method of fabricating such a wiring board.
2. Description of the Background Art
FIG. 27 is a sectional view of a structure of a conventional wiring board. Referring to FIG. 27, a conventional wiring board includes a first conductor formation substrate 104 and a second conductor formation substrate 107. First conductor formation substrate 104 includes a first substrate 102 formed of, for example, epoxy glass base material, and a conductive first electrode 103 formed in plurality on the plane of first substrate 102, and identified as the first conductor. Second conductor formation substrate 107 includes a second substrate 105 formed of, for example, epoxy glass base material, and a conductive second electrode 106 formed in plurality at second substrate 105, and identified as a second conductor. First and second conductor formation substrates 104 and 107 are disposed with first and second electrodes 103 and 106 facing each other. Wiring board 101 includes a dielectric 108 of a dielectric between first and second conductor formation substrates 104 and 107.
The above-described wiring board 101 employs an internal configuration as a parallel-plate capacitor by the arrangement of first and second electrodes 103 and 106 located facing each other with dielectric 108 therebetween within wiring board 101. Accordingly, the area of the capacitor occupying wiring board 101 is reduced to allow a smaller wiring board 101.
Japanese Patent Laying-Open No. 2001-077539 discloses formation of an inductor in a wiring board by mixing powder of high magnetic permeability into a dielectric of the wiring board. In other words, by mixing powder of high magnetic permeability into dielectric 108, an inductor can be formed in wiring board 101 in addition to the capacitor, allowing a further smaller wiring board 101.
A method of fabricating this wiring board 101 will be described with reference to FIGS. 28–30 schematically representing fabrication steps. First, a plurality of first electrodes 103 are formed on first substrate 102 to form first conductor formation substrate 104. Then, a dielectric sheet 109 is disposed at the first electrode 103 side of first conductor formation substrate 104, followed by deposition of a metal foil 110 thereon (FIG. 28). Dielectric sheet 109 is formed of thermosetting epoxy resin that is hardened when first melted at a predetermined temperature and then subjected to higher temperature. The temperature is gradually increased to have dielectric sheet 109 melted while the stacked first conductor formation substrate 104, dielectric sheet 109 and metal foil 110 are sandwiched between stainless steel plates to be compressed in the stacked direction. During this compression process, the pressing force is adjusted so as to obtain a predetermined distance between metal foil 110 and first electrode 103. This adjustment continues until dielectric sheet 109 is hardened. Thus, dielectric sheet 109 is formed as a dielectric 108 in close adherence to first conductor formation substrate 104 and metal foil 110 (FIG. 29). Then, metal foil 110 is etched to form second electrode 106 (FIG. 30). At the final stage, epoxy glass base material, for example, is heated and melted to form second substrate 105 at the second electrode 106 side of dielectric 108. Eventually, wiring board 101 shown in FIG. 27 is fabricated.
In the above-described fabrication method of wiring board 101, compression is applied in the approaching direction between first conductor formation substrate 104 and metal foil 110 while the entire dielectric sheet 109 attains a melting state. This means that dielectric sheet 109 corresponding to the perimeter area of first conductor formation substrate 104 and metal foil 110 may readily flow outside whereas the inner portion of dielectric sheet 109 is less likely to flow out since there is no place to escape. Therefore, the eventual wiring board 101 will exhibit a tendency of dielectric 108 between first electrode 103 and second electrode 106 being thinner at the perimeter area of wiring board 101 thicker inwards. Even if first electrode 103 and second electrode 106 facing each other have the same area, the capacitance as capacitors thereof will differ since the thickness of dielectric 108 differs between the perimeter area and the inner area of wiring board 101. Particularly in the case where the distance between the first and second electrodes 103 and 106 (referred to as “interelectrode distance” hereinafter) is reduced to increase the capacitance of the capacitor, the difference in the inter-electrode distance will greatly affect the capacitance of the capacitor. Thus, there was a problem of increase in the variation of the capacitance at respective sites in wiring board 101 caused by the large difference in the capacitance of the capacitor between the perimeter side region and inner side region of wiring board 101.
Also, shorting will occur between first and second electrodes 103 and 106 in wiring board 101 when there is a foreign object between first electrode 103 and metal foil 110, for example, or when direct contact is established between a first electrode 103 and metal foil 110, inducing the possibility of not being able to function as a capacitor.
Variation in the distance between first and second electrodes 103 and 106 as well as shorting between first and second electrodes 103 and 106 is disadvantageous in that, even in the case where an inductor is formed internally, that inductance will differ greatly between the perimeter side region and inner region of wiring board 101.
In practical applications, the lifetime of a wiring board depends on the occurrence of delamination. The need arises for a wiring board that has occurrence of such delamination suppressed to ensure the lifetime of a wiring board.
Description proceeds to another conventional art. A multilayer printed wiring board aimed to increase the wiring density is fabricated by the so-called build up method. In the fabrication of a multilayer printed wiring board according to the build up method, an insulator layer and conductor layer are sequentially stacked on a core substrate. Electrical connection between these layers is established by forming a hole at appropriate predetermined positions, and filling the hole with conductive resin or apply metal coating. In the method of establishing electrical connection between layers by a through hole, all the conductor layers must be pierced. In contrast, only conductor layers that require electrical connection are to be pierced according to the build up method. Therefore, the wiring density can be increased in a multilayer printed wiring board fabricated by the build up method.
Some multilayer printed wiring boards incorporate a parallel-plate capacitor with an insulator layer identified as a dielectric provided between conductor layers identified as capacitor electrodes facing each other. Such a multilayer printed wiring board incorporating a capacitor is disclosed in International Publication No. WO 91/02647 (U.S. Pat. No. 5,079,069) as a capacitive printed wiring board.
The capacitive printed wiring board disclosed in International Publication No. WO 91/02647 (U.S. Pat. No. 5,079,069) includes a capacitor laminate in the printed wiring board. This capacitor laminate is formed of a pair of conductive sheets provided with a predetermined distance therebetween, and a dielectric sheet provided between the conductive sheets. The conductive sheet is formed of a conductive material, preferably copper. The dielectric sheet is formed of, for example, ceramic filled with epoxy. At the surface of the capacitive printed wiring board is attached a device to which the pair of conductive sheets is connected via a power supply line and a ground line.
Another multilayer printed wiring board incorporating a capacitor is disclosed in Japanese Patent Laying-Open No. 2002-204073 as a multilayer board.
The multilayer board disclosed in Japanese Patent Laying-Open No. 2002-204073 includes a film having circuitry formed at the surface, a fiber reinforced resin layer provided at both sides of the film, and an outermost layer circuit provided above the fiber reinforced resin layer. For the purpose of forming a capacitor circuit at the film, the film includes the mixture inorganic powder having a high dielectric constant such as lead zirconate titanate (PZT). By using a thin film of constant thickness, the capacitance of the capacitor can be maintained at a high and constant level.
The capacitive printed wiring board disclosed in International Publication No. WO 91/02647 (U.S. Pat. No. 5,079,069) employs epoxy that is thermosetting resin for the dielectric sheet that functions as the dielectric of a capacitor laminate. In the fabrication of a capacitor laminate, epoxy in a fluidized state is disposed between the pair of conductive sheets. The pair of conductive sheets is pressed together until the distance between the conductive sheets attains a predetermined value. Then, the epoxy is heated to be cured, whereby a capacitor laminate is completed.
It is difficult to precisely control the distance between the conductive sheets under a state where epoxy is disposed in a fluidized state. Specifically, when pressing is applied on the pair of conductive sheets, excessive epoxy located between the pair of conductive sheets will move from the center area to the perimeter area of the conductive sheet to be forced outside. The conductive sheet has a tendency of being thick at the center region and thinner towards the perimeter region. It is to be noted that the capacitive density of a capacitor depends on the distance between the pair of conductive sheets and the dielectric constant of the dielectric sheet. If the distance between the pair of conductive sheets cannot be precisely controlled, problems such as disallowing formation of a capacitor at the desired capacitive density or variation in the capacitive density of the capacitor will occur.
In order to increase the capacitive density of the capacitor, the distance between the pair of conductive sheets must be set small. However, there is a possibility of the distance between the conductive sheets being smaller than the predetermined distance since it is difficult to precisely control the distance between the pair of conductive sheets. In such cases, defects such as a pinhole, crack or void may be generated at the dielectric sheet corresponding to such close area. There is also a possibility of shorting occurring between the conductive sheets. Such problem are particularly noticeable at the perimeter region of the conductive sheet due to the smaller film thickness thereof. Sufficient breakdown voltage of a capacitor cannot be ensured.
In the multilayer board disclosed in Japanese Patent Laying-Open No. 2002-204073, the film has inorganic powder of high dielectric constant included to form a capacitor circuit. Such inorganic powder of high dielectric constant is generally added to epoxy resin or the like and applied to the film in a fluidized state. Therefore, there is a possibility of the aforementioned problem being induced.